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課程名稱 |
類比積體電路
Analog Integrated Circuit |
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開課學期 |
100-1 |
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授課對象 |
電機資訊學院 生醫電子與資訊學研究所 |
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授課教師 |
李致毅 |
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課號 |
EE5112 |
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課程識別碼 |
921 U7060 |
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班次 |
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學分 |
3 |
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全/半年 |
半年 |
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必/選修 |
選修 |
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上課時間 |
星期五6,7,8(13:20~16:20) |
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上課地點 |
明達231 |
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備註 |
總人數上限：190人 |
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課程簡介影片 |
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核心能力關聯 |
本課程尚未建立核心能力關連 |
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課程大綱
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為確保您我的權利,請尊重智慧財產權及不得非法影印
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課程概述 |
THIS COURSE IS OFFERED FOR ELECTRICAL ENGINEERING DEPARTMENT AND GRADUATE INSTITUTE OF ELECTRONICS ENGINEERING. THIS COURSE IS GRADUATE-LEVEL AND SUITABLE FOR SENIOR UNDERGRADUATE STUDENTS AND GRADUATE STUDENTS. IT IS A SELECTIVE COURSE AND CONTAINS 13 CHAPTERS.
1: BASIC MOS DEVICE PHYSICSCHAPTER 2: SINGLE-STAGE AMPLIFIERSCHAPTER 3: DIFFERENTIAL AMPLIFIERSCHAPTER 4: PASSIVE AND ACTIVE CURRENT MIRRORS CHAPTER 5: FREQUENCY RESPONSE OF AMPLIFIERSCHAPTER 6: NOISECHAPTER 7: FEEDBACKCHAPTER 8: OPERATIONAL AMPLIFIERSCHAPTER 9: STABILITY AND FREQUENCY COMPENSATIONCHAPTER 10: SWITCH-CAP CIRCUITSCHAPTER 11: BANDGAP REFERENCESCHAPTER 12: NONLINEARITY AND MISMATCHCHAPTER 13: LAYOUT AND PACKAGING |
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課程目標 |
STUDENTS WHO TAKE THIS COURSE ARE EXPECTED TO USE MATLAB-SIMULINK AND CIRCUIT SIMULATORS, SUCH AS HSPICE AND LAYOUT TOOLS, SUCH AS CADENCE TO DESIGN AND ANALYZE VLSI ANALOG CIRCUITS. |
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課程要求 |
STUDENTS ARE EXPECTED TO KNOW SOME FUNDAMENTALS OF CIRCUITS AND ELECTRONIC CIRCUITS.
GRADING
1. 20% HOMEWORK+ 30% MIDTERM+ 30% FINAL+ 20% PROJECT |
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預期每週課後學習時數 |
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Office Hours |
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指定閱讀 |
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參考書目 |
TEXTBOOK
“DESIGN OF ANALOG CMOS INTEGRATED CIRCUITS” BY BEHZAD RAZAVI, MCGRAW-HILL, 2001
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評量方式
(僅供參考) |
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